This invention relates generally to capacitive micromachined ultrasonic transducer arrays in which electrical connections are made to the individual array elements through vias extending through the wafer on which the array elements are formed.
Capacitive micromachined ultrasonic transducers (cMUTs) have been emerging as an attractive alternative to piezoelectric transducers. They offer a larger set of parameters for optimization of transducer performance as well as ease of fabrication and electronic integration. The fabrication and operation of micromachined ultrasonic transducers have been described in many publications and patents. For example, U.S. Pat. Nos. 5,619,476; 5,870,351 and 5,894,452, incorporated herein by reference, describe the fabrication of capacitive-type ultrasonic transducers in which membranes are supported above a substrate by insulative supports such as silicon nitride, silicon oxide and polyamide. The supports engage the edges of each membrane to form cells. A voltage applied between the substrate and a conductive film on the surface of the membrane causes the cell membranes to vibrate and emit sound waves. The membranes can be sealed to provide operation of the transducers immersed in a liquid. Generally, the transducer includes a plurality of cells of the same or different sizes and/or shapes. In operation, multi-cell transducer elements are disposed in arrays with the electrical excitation of the elements controlled to provide desired beam patterns.
It is desirable to apply control voltages to the transducers from the back side of the wafer on which the transducers are formed. This is particularly true where one desires to integrate the cMUT array with the image processing electronics contained in a semiconductor chip or chips.
It is an object of the present invention to provide a cMUT array in which driving voltages are applied to the array element electrodes through the support wafer or substrate, and through vias formed on the support wafer or substrate.
It is another object of the present invention to provide a cMUT array which can be easily integrated with an image processing chip or chips.
There is provided a cMUT array which includes through wafer via connections to individual elements of the array, and to a cMUT array which can be integrated with image processing electronics formed in a separate chip of wafer.